GPU Partitioning, Power, and Performance of the AMD MI300A

Jan 25, 2026 by A. Abouelmagd, David Boehme, Stephanie Brink, J. Burmark, Michael McKinsey, Anthony Skjellum, Olga Pearce (SCA/HPC Asia)

DOI 10.1145/3773656.3773680

We measured the MI300A across its SPX/TPX/CPX partitions and power-sharing behavior using RAJA kernels and hardware counters, showing how partitioning can swing stencil performance by ~30% and power throttling can cost up to ~20% on FLOP-bound code — useful if you care about squeezing El Capitan-class APUs for real workloads.

source S2, crossref