CIM-Tuner: Balancing the Compute and Storage Capacity of SRAM-CIM Accelerator via Hardware-mapping Co-exploration

Jan 26, 2026 by Jinwu Chen, Yuhui Shi, He Wang, Zhe Jiang, Jun Yang, Xin Si, Zhenhua Zhu (arXiv.org)

DOI 10.48550/arXiv.2601.18070

We built CIM-Tuner, an automatic hardware-mapping co-exploration tool that balances compute and storage in SRAM-CIM accelerators by treating CIM macros as matrices and jointly exploring accelerator scheduling and macro tiling; it’s universal across CIM designs and squeezes out big wins in energy and throughput. Our simulator is silicon-verified and the open-source tool is on GitHub so you can repro and apply it to your favorite CIM macro.

source S2, openalex