High-Speed AXI4-Lite Dynamic MAC Accelerator for RISC-V SoC Designs

Jan 1, 2026 by Thirunaavukarasan S, Sriram N, R. G (ITM Web of Conferences)

This design and realization of a high-speed dynamic-precision Multiply–Accumulate (DPMAC) accelerator targets embedded and RISC-V-based System-on-Chip (SoC) platforms. Unlike conventional MAC units that operate with a fixed precision, this design supports runtime configurable 8-, 16-, and 32-bit precision modes. These modes allow accuracy, energy efficiency, and operational behaviour to be tuned according to workload requirements, while the pipeline maintains the same latency for all modes.