Evolutionary Mapping of Neural Networks to Spatial Accelerators

Feb 4, 2026 by Alessandro Pierro, Jonathan Timcheck, Jason Yik, Marius Lindauer, Eyke Hullermeier, Marcel Wever

We turned the painful, expert-only chore of mapping neural graphs to spatial neuromorphic chips into a hands-off evolutionary, hardware-in-the-loop optimizer, and ran it on Intel Loihi 2 to show real-world wins. It finds mappings that cut latency by up to 35% on sparse MLPs, scale across chips, and even improve energy efficiency without being told to—so you get better deployments without becoming a mapping wizard.

source S2