Programming Weights to Analog In-Memory Computing Cores by Direct Minimization of the Matrix-Vector Multiplication Error

Dec 1, 2023 by J. Büchel, A. Vasilopoulos, B. Kersting, C. Lammie, K. Brew, T. Philip, N. Saulnier, Vijay Narayanan, M. Le Gallo, A. Sebastian (IEEE Journal on Emerging and Selected Topics in Circuits and Systems)

DOI 10.1109/JETCAS.2023.3329449

We teach AIMC cores to program themselves by directly minimizing the end-to-end MVM error with SGD on synthetic inputs, avoiding per-cell tricks and high-res ADCs and yielding substantial accuracy gains on real PCM 14nm hardware; it’s a simple, scalable way to make analog weights behave like their digital counterparts.

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