Programming Weights to Analog In-Memory Computing Cores by Direct Minimization of the Matrix-Vector Multiplication Error

Dec 1, 2023 by J. Büchel, A. Vasilopoulos, B. Kersting, C. Lammie, K. Brew, T. Philip, N. Saulnier, Vijay Narayanan, M. Le Gallo, A. Sebastian (IEEE Journal on Emerging and Selected Topics in Circuits and Systems)

Accurate programming of non-volatile memory (NVM) devices in analog in-memory computing (AIMC) cores is critical to achieve high matrix-vector multiplication (MVM) accuracy during deep learning inference workloads. In this paper, we propose a novel programming approach that directly minimizes the MVM error by performing stochastic gradient descent optimization with synthetic random input data. The MVM error is significantly reduced compared to the conventional unit-cell by unit-cell iterative programming.