FPGA Programmable Logic Block Architecture with High-Density MAC for Deep Learning Inference

Feb 13, 2026 by Yanli Wang, Lijiang Gao, Haigang Yang (Electronics)

DOI 10.3390/electronics15040801

We redesigned FPGA logic blocks to pack high-density MACs for low-precision DNN inference, proposing seven BLE variants that trade fracturability, area, and speed to squeeze up to ~72% DAP reduction for multipliers; the ADD2_BLE and CMUL combos are especially fun because they push soft MAC density way past conventional LUT layouts while keeping the fabric universally useful.

source S2, crossref